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Computer Architecture : (Record no. 16069)

000 -LEADER
fixed length control field 03930cam a2200337 i 4500
001 - CONTROL NUMBER
control field ocn755102367
003 - CONTROL NUMBER IDENTIFIER
control field OCoLC
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20150723154609.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 111004t20122012maua rb 001 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780123838728
040 ## - CATALOGING SOURCE
Original cataloging agency PSP
Transcribing agency PSP
Language of cataloging eng
Description conventions rda
050 ## - LIBRARY OF CONGRESS CALL NUMBER
Classification number QA76.9.A73
Item number .H515 2012
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Hennessy, John L.
9 (RLIN) 8021
245 10 - TITLE STATEMENT
Title Computer Architecture :
Remainder of title A Quantitative Approach /
Statement of responsibility, etc John L. Hennessy, David A. Patterson
250 ## - EDITION STATEMENT
Edition statement FIFTH EDITION
264 ## - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Place of production, publication, distribution, manufacture Waltham, MA :
Name of producer, publisher, distributor, manufacturer Morgan Kaufmann,
Date of production, publication, distribution, manufacture, or copyright notice 2012.
-- c2012.
300 ## - PHYSICAL DESCRIPTION
Extent xxvii, 493 pages :
Other physical details illustrations ;
Dimensions 24 cm
336 ## - CONTENT TYPE
Source rdacontent
Content Type Term text
337 ## - MEDIA TYPE
Source rdamedia
Media type term unmediated
338 ## - CARRIER TYPE
Source rdacarrier
Carrier type term volume
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc Includes bibliographical references (pages R1-R32) and index.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Fundamentals of quantitative design and analysis -- Memory hierarchy design -- Instruction-level parallelism and its exploitation -- Data-level parallelism in vector, SIMD, and GPU architectures -- Thread-level parallelism -- Warehouse-scale computers to exploit request-level and data-level parallelism -- Instruction set principles -- Review of memory hierarchy -- Pipelining: basic and intermediate concepts -- Online appendices. Storage systems -- Embedded systems -- Interconnection networks -- Vector processors in more depth -- Hardware and software for VLIW and EPIC -- Large-scale multiprocessors and scientific applications -- Computer arithmetic -- Survey of instruction set architectures -- Historical perspectives and references.
520 ## - SUMMARY, ETC.
Summary, etc Computer Architecture: A Quantitative Approach explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book became a part of Intel's 2012 recommended reading list for developers, and it covers the revolution of mobile computing. The text also highlights the two most important factors in architecture today: parallelism and memory hierarchy. The six chapters that this book is composed of follow a consistent framework: explanation of the ideas in each chapter; a "crosscutting issues" section, which presents how the concepts covered in one chapter connect with those given in other chapters; a "putting it all together" section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. The first chapter of the book includes formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability. Chapter 2 discusses memory hierarchy and includes discussions about virtual machines, SRAM and DRAM technologies, and new material on Flash memory. The third chapter covers the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, followed by an introduction to vector architectures in the fourth chapter. Chapters 5 and 6 describe multicore processors and warehouse-scale computers (WSCs), respectively. This book is an important reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers. Fully updated fifth edition covers the twin shifts to mobile and cloud computing, with new material, exercises, and case studies.--Publisher website.
591 ## - JABATAN
Jabatan Jabatan Teknologi Maklumat dan Komunikasi
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer architecture.
9 (RLIN) 1584
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Patterson, David A.
9 (RLIN) 8020
856 42 - ELECTRONIC LOCATION AND ACCESS
Materials specified Book website, supplemental materials, online appendices
Uniform Resource Identifier http://booksite.elsevier.com/9780123838728/
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme
Item type Book
Classification part QA76.9.A73
Call number prefix .H515 2012
Holdings
Price effective from Permanent location Date last seen Not for loan Date acquired Source of classification or shelving scheme Koha item type Barcode Damaged status Lost status Shelving location Withdrawn status Cost, normal purchase price Current location Full call number
2015-07-23Perpustakaan Politeknik Seberang Perai0000-00-00 2015-07-23 Book0000050659  Open Shelf 420.18Perpustakaan Politeknik Seberang PeraiQA76.9.A73 .H515 2012
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