000			03930cam a2200337 i 4500
001			ocn755102367
003			OCoLC
005			20150723154609.0
008			111004t20122012maua rb 001 0 eng d
020			_a9780123838728
040			_aPSP _cPSP _beng _erda
050			_aQA76.9.A73 _b.H515 2012
100	1		_aHennessy, John L. _98021
245	1	0	_aComputer Architecture : _bA Quantitative Approach / _cJohn L. Hennessy, David A. Patterson
250			_aFIFTH EDITION
264			_aWaltham, MA : _bMorgan Kaufmann, _c2012. _cc2012.
300			_axxvii, 493 pages : _billustrations ; _c24 cm
336			_2rdacontent _atext
337			_2rdamedia _aunmediated
338			_2rdacarrier _avolume
504			_aIncludes bibliographical references (pages R1-R32) and index.
505	0		_aFundamentals of quantitative design and analysis -- Memory hierarchy design -- Instruction-level parallelism and its exploitation -- Data-level parallelism in vector, SIMD, and GPU architectures -- Thread-level parallelism -- Warehouse-scale computers to exploit request-level and data-level parallelism -- Instruction set principles -- Review of memory hierarchy -- Pipelining: basic and intermediate concepts -- Online appendices. Storage systems -- Embedded systems -- Interconnection networks -- Vector processors in more depth -- Hardware and software for VLIW and EPIC -- Large-scale multiprocessors and scientific applications -- Computer arithmetic -- Survey of instruction set architectures -- Historical perspectives and references.
520			_aComputer Architecture: A Quantitative Approach explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book became a part of Intel's 2012 recommended reading list for developers, and it covers the revolution of mobile computing. The text also highlights the two most important factors in architecture today: parallelism and memory hierarchy. The six chapters that this book is composed of follow a consistent framework: explanation of the ideas in each chapter; a "crosscutting issues" section, which presents how the concepts covered in one chapter connect with those given in other chapters; a "putting it all together" section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. The first chapter of the book includes formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability. Chapter 2 discusses memory hierarchy and includes discussions about virtual machines, SRAM and DRAM technologies, and new material on Flash memory. The third chapter covers the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, followed by an introduction to vector architectures in the fourth chapter. Chapters 5 and 6 describe multicore processors and warehouse-scale computers (WSCs), respectively. This book is an important reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers. Fully updated fifth edition covers the twin shifts to mobile and cloud computing, with new material, exercises, and case studies.--Publisher website.
591			_aJTMK
650		0	_aComputer architecture. _91584
700	1		_aPatterson, David A. _98020
856	4	2	_3Book website, supplemental materials, online appendices _uhttp://booksite.elsevier.com/9780123838728/
541	0		_aBookline Services _bNO. 12, Jalan Jasa 20, Taman Medan Pejasa, 46000 Petaling Jaya, Selangor. _cSebutharga _d27 Jun 2015 _e50659 _fPSP _h420.18 _n1 _o1 Volume
942			_2lcc _cBK _hQA76.9.A73 _k.H515 2012 _6QA00769 A73
959			_aZO _bRAR
999			_c16069 _d16069